From b76fcdd866f9ad7c9bd90d2060280b5925ddcc3d Mon Sep 17 00:00:00 2001
From: Florent Gluck <florent.gluck@hesge.ch>
Date: Fri, 8 Nov 2024 11:27:18 +0100
Subject: [PATCH] removed extern from idt.c
---
.../skeleton/yoctos/kernel/interrupt/idt.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/labs/lab3-interrupts_timer_keyboard/skeleton/yoctos/kernel/interrupt/idt.c b/labs/lab3-interrupts_timer_keyboard/skeleton/yoctos/kernel/interrupt/idt.c
index 86a1102..4fa38ac 100644
--- a/labs/lab3-interrupts_timer_keyboard/skeleton/yoctos/kernel/interrupt/idt.c
+++ b/labs/lab3-interrupts_timer_keyboard/skeleton/yoctos/kernel/interrupt/idt.c
@@ -57,7 +57,7 @@ static idt_ptr_t idt_ptr;
// Loads the IDT specified in argument.
// Defined in idt_asm.s
-extern void idt_load(idt_ptr_t *idt_ptr);
+void idt_load(idt_ptr_t *idt_ptr);
// Builds and returns an IDT entry.
// selector is the code segment selector to access the ISR
@@ -78,12 +78,12 @@ static idt_entry_t idt_build_entry(uint16_t selector, uint32_t offset, uint8_t t
// Low-level ISR for processor exceptions.
// These are defined in idt_asm.s
-extern void _exception3();
-extern void _exception8();
+void _exception3();
+void _exception8();
// Low-level ISR for hardware interrupts.
// These are defined in idt_asm.s
-extern void _irq5();
+void _irq5();
// High-level ISR for processor exceptions.
void exception_handler(regs_t *regs) {
--
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