home.md

@@ -10,14 +10,14 @@ We intend to use it to prototype self-adaptive and self-organizing hardware arch
 
 ## The SCALP node
 
-The SCALP node is mainly composed of a Xilinx Zynq SoC( dual-core ARM Cortex-A9 @866~MHz + Artix-7 programmable logic with 74,000~cells), 2~Gb DDR3 SDRAM, a 5-port Ethernet switch, a PLL   . 
+The [SCALP node](pcb/scalp_mainboard) is mainly composed of a Xilinx Zynq SoC( dual-core ARM Cortex-A9 @866~MHz + Artix-7 programmable logic with 74,000~cells), 2~Gb DDR3 SDRAM, a 5-port Ethernet switch, a PLL. For more information, please check [SCALP node](pcb/scalp_mainboard) wiki page.
 
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 <img src=uploads/da8a1a3710fb28f9380f0bd24ecda8e4/SCALP_top.jpg alt="SCALP_top" width=600>
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-## The SCALP base board 
-The base board provides power supply for a SCALP node or a stack of nodes. It also contains an Ethernet phy permitting to access the Ethernet switch on the SCALP board, a MIPI interface, and an USB OTG.  
+## The SCALP base board
+The [base board](pcb/scalp_base) provides power supply for a SCALP node or a stack of nodes. It also contains an Ethernet phy permitting to access the Ethernet switch on the SCALP board, a MIPI interface, and an USB OTG. For more information, please check [SCALP base board](pcb/scalp_base) wiki page. 
 
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 ![stack_1x1x1](uploads/3aae2f3ba704ce396450e648e4e8f114/stack_1x1x1.jpg)