From 0d4a48e6ee6035759963efd3b3825329ab770195 Mon Sep 17 00:00:00 2001
From: "orphee.antoniad" <orphee.antoniadis@hesge.ch>
Date: Fri, 11 Jun 2021 10:18:31 +0200
Subject: [PATCH] Update in MIPI project : (Camera driver fully working) -
Change petalinux kernel config to add missing drivers - Move amba_pl to
pl-user.dtsi - Increase CMA buffer size from 16M to 32M
---
scalp_mipi/project-spec/configs/config | 2 +-
.../configs/u-boot-xlnx/platform-auto.h | 2 +-
.../device-tree/files/pl-user.dtsi | 164 ++++++
.../recipes-bsp/device-tree/files/pl.dtsi | 137 +----
.../device-tree/files/system-user.dtsi | 475 +++++++-----------
5 files changed, 341 insertions(+), 439 deletions(-)
create mode 100644 scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl-user.dtsi
diff --git a/scalp_mipi/project-spec/configs/config b/scalp_mipi/project-spec/configs/config
index 93cbc1a..392676e 100644
--- a/scalp_mipi/project-spec/configs/config
+++ b/scalp_mipi/project-spec/configs/config
@@ -155,7 +155,7 @@ CONFIG_SUBSYSTEM_ENDIAN_LITTLE=y
# DTG Settings
#
CONFIG_SUBSYSTEM_MACHINE_NAME="template"
-CONFIG_SUBSYSTEM_EXTRA_DT_FILES="pl.dtsi"
+CONFIG_SUBSYSTEM_EXTRA_DT_FILES="pl.dtsi pl-user.dtsi"
#
# Kernel Bootargs
diff --git a/scalp_mipi/project-spec/configs/u-boot-xlnx/platform-auto.h b/scalp_mipi/project-spec/configs/u-boot-xlnx/platform-auto.h
index 10d49d6..b8bd524 100644
--- a/scalp_mipi/project-spec/configs/u-boot-xlnx/platform-auto.h
+++ b/scalp_mipi/project-spec/configs/u-boot-xlnx/platform-auto.h
@@ -35,7 +35,7 @@
#define CONFIG_MII
#define CONFIG_NET_MULTI
#define CONFIG_NETCONSOLE 1
-#define CONFIG_SERVERIP 172.16.251.147
+#define CONFIG_SERVERIP 172.16.251.154
#define CONFIG_IPADDR 192.168.0.10
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_NETMASK 255.255.255.0
diff --git a/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl-user.dtsi b/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl-user.dtsi
new file mode 100644
index 0000000..1527fc0
--- /dev/null
+++ b/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl-user.dtsi
@@ -0,0 +1,164 @@
+/*
+ * Scalp Board PL User DTS
+ *
+ * Copyright (c) 2018-2021 Hepia
+ * Orphee Antoniadis <orphee.antoniadis@hesge.ch>
+ *
+ */
+
+/ {
+ amba_pl: amba_pl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges ;
+
+ scalp_safe_firmware_0: scalp_safe_firmware_reg_bank@43c10000 {
+ //clock-names = "SAxiClkxCI";
+ //clocks = <&clkc 15>;
+ compatible = "generic-uio";
+ reg = <0x43c10000 0x1000>;
+ };
+
+ misc_clk_0: misc_clk_0 {
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ compatible = "fixed-clock";
+ };
+
+ mipi_csi2_rx_subsyst_0: mipi_csi2_rx_subsystem@43c20000 {
+ clock-names = "lite_aclk", "dphy_clk_200M", "video_aclk";
+ clocks = <&clkc 15>, <&misc_clk_0>, <&clkc 15>;
+ compatible = "xlnx,mipi-csi2-rx-subsystem-5.1";
+ reg = <0x43c20000 0x1000>;
+ interrupt-names = "csirxss_csi_irq";
+ interrupt-parent = <&intc>;
+ interrupts = <0 30 4>;
+ xlnx,axis-tdata-width = <32>;
+ xlnx,cal-mode = "NONE";
+ xlnx,clk-io-swap = "false";
+ xlnx,clk-lane-io-position = <0x0>;
+ xlnx,clk-lp-io-swap = "false";
+ xlnx,csi-en-activelanes = "false";
+ xlnx,csi-en-crc = "true";
+ xlnx,csi-filter-userdatatype = "false";
+ xlnx,csi-opt1-regs = "false";
+ xlnx,csi-pxl-format = "YUV422_8bit";
+ xlnx,csi2rx-dbg = <0x0>;
+ xlnx,data-lane0-io-position = <0x2>;
+ xlnx,data-lane1-io-position = <0x4>;
+ xlnx,data-lane2-io-position = <0x6>;
+ xlnx,data-lane3-io-position = <0x8>;
+ xlnx,dl0-io-swap = "false";
+ xlnx,dl0-lp-io-swap = "false";
+ xlnx,dl1-io-swap = "false";
+ xlnx,dl1-lp-io-swap = "false";
+ xlnx,dl2-io-swap = "false";
+ xlnx,dl2-lp-io-swap = "false";
+ xlnx,dl3-io-swap = "false";
+ xlnx,dl3-lp-io-swap = "false";
+ xlnx,dphy-lanes = <0x2>;
+ xlnx,dphy-mode = "SLAVE";
+ xlnx,en-7s-linerate-check = "false";
+ xlnx,en-bg0-pin0 = "false";
+ xlnx,en-bg0-pin6 = "false";
+ xlnx,en-bg1-pin0 = "false";
+ xlnx,en-bg1-pin6 = "false";
+ xlnx,en-bg2-pin0 = "false";
+ xlnx,en-bg2-pin6 = "false";
+ xlnx,en-bg3-pin0 = "false";
+ xlnx,en-bg3-pin6 = "false";
+ xlnx,en-clk300m = "false";
+ xlnx,en-cnts-byte-clk = "false";
+ xlnx,en-csi-v2-0 = "false";
+ xlnx,en-exdesigns = "false";
+ xlnx,en-ext-tap = "false";
+ xlnx,en-timeout-regs = "false";
+ xlnx,en-vcx = "false";
+ xlnx,esc-timeout = <0x6400>;
+ xlnx,exdes-board = "ZCU102";
+ xlnx,exdes-config = "MIPI_Video_Pipe_Camera_to_Display";
+ xlnx,exdes-fmc = "LI-IMX274MIPI-FMC V1.0 Single Sensor";
+ xlnx,exdesboard-version = "xilinx.com:vck190:part0:2.0";
+ xlnx,fifo-rd-en-control = "true";
+ xlnx,hs-line-rate = <0x320>;
+ xlnx,hs-settle-ns = <0x93>;
+ xlnx,hs-timeout = <0x10005>;
+ xlnx,idly-group-name = "mipi_csi2rx_idly_group";
+ xlnx,idly-tap = <0x1>;
+ xlnx,init = <0x186a0>;
+ xlnx,int-qor-check = <0x0>;
+ xlnx,is-7series = "true";
+ xlnx,is-versal = "false";
+ xlnx,lprx-disable-extport = <0x0>;
+ xlnx,max-lanes = <2>;
+ xlnx,mipi-slv-int = <0x0>;
+ xlnx,ooc-vid-clk = "6.666";
+ xlnx,ppc = <1>;
+ xlnx,rcve-alt-deskew-seq = "false";
+ xlnx,rcve-deskew-seq = "false";
+ xlnx,share-idlyctrl = "false";
+ xlnx,stretch-line-rate = <0xdac>;
+ xlnx,vc = <4>;
+ xlnx,vfb ;
+ mipi_csi_portsmipi_csi2_rx_subsyst_0: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mipi_csi_port0mipi_csi2_rx_subsyst_0: port@0 {
+ reg = <0>;
+ xlnx,cfa-pattern = "rggb";
+ xlnx,video-format = <12>;
+ xlnx,video-width = <8>;
+ mipi_csirx_outmipi_csi2_rx_subsyst_0: endpoint {
+ remote-endpoint = <&v_frmbuf_wr_0mipi_csi2_rx_subsyst_0>;
+ };
+ };
+ mipi_csi_port1mipi_csi2_rx_subsyst_0: port@1 {
+ reg = <1>;
+ xlnx,cfa-pattern = "rggb";
+ xlnx,video-format = <12>;
+ xlnx,video-width = <8>;
+ mipi_csi_inmipi_csi2_rx_subsyst_0: endpoint {
+ };
+ };
+ };
+ };
+
+ v_frmbuf_wr_0: v_frmbuf_wr@43c30000 {
+ #dma-cells = <1>;
+ clock-names = "ap_clk";
+ clocks = <&clkc 15>;
+ compatible = "xlnx,v-frmbuf-wr-2.2", "xlnx,axi-frmbuf-wr-v2.1";
+ reg = <0x43c30000 0x10000>;
+ interrupt-names = "interrupt";
+ interrupt-parent = <&intc>;
+ interrupts = <0 31 4>;
+ xlnx,dma-addr-width = <32>;
+ xlnx,dma-align = <8>;
+ xlnx,max-height = <480>;
+ xlnx,max-width = <640>;
+ xlnx,pixels-per-clock = <1>;
+ xlnx,s-axi-ctrl-addr-width = <0x7>;
+ xlnx,s-axi-ctrl-data-width = <0x20>;
+ xlnx,vid-formats = "rgb888", "uyvy";
+ xlnx,video-width = <8>;
+ };
+
+ vcap_mipi_csi2_rx_subsyst_0 {
+ compatible = "xlnx,video";
+ dma-names = "port0";
+ dmas = <&v_frmbuf_wr_0 0>;
+ vcap_portsmipi_csi2_rx_subsyst_0: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vcap_portmipi_csi2_rx_subsyst_0: port@0 {
+ direction = "input";
+ reg = <0>;
+ v_frmbuf_wr_0mipi_csi2_rx_subsyst_0: endpoint {
+ remote-endpoint = <&mipi_csirx_outmipi_csi2_rx_subsyst_0>;
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl.dtsi b/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl.dtsi
index c1a0802..9ca2367 100644
--- a/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl.dtsi
+++ b/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/pl.dtsi
@@ -1,10 +1,11 @@
/*
- * CAUTION: This file is automatically generated by Xilinx.
- * Version:
- * Today is: Mon Jun 7 19:02:33 2021
+ * Scalp Board PL DTS Overlay
+ *
+ * Copyright (c) 2018-2021 Hepia
+ * Orphee Antoniadis <orphee.antoniadis@hesge.ch>
+ *
*/
-
/dts-v1/;
/plugin/;
/ {
@@ -41,7 +42,6 @@
overlay2: __overlay__ {
#address-cells = <1>;
#size-cells = <1>;
-
scalp_axi4lite_0: scalp_axi4lite@43c00000 {
clock-names = "SAxiClkxCI";
clocks = <&clkc 15>;
@@ -59,8 +59,7 @@
xlnx,axi4-rresp-size = <0x2>;
xlnx,axi4-wdata-size = <0x20>;
xlnx,axi4-wstrb-size = <0x4>;
- };
-
+ };
scalp_safe_firmware_0: scalp_safe_firmware_reg_bank@43c10000 {
clock-names = "SAxiClkxCI";
clocks = <&clkc 15>;
@@ -76,130 +75,6 @@
xlnx,axi4-wdata-size = <0x20>;
xlnx,axi4-wstrb-size = <0x4>;
};
- /*
- misc_clk_0: misc_clk_0 {
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- compatible = "fixed-clock";
- };
-
- mipi_csi2_rx_subsyst_0: mipi_csi2_rx_subsystem@43c20000 {
- clock-names = "lite_aclk", "dphy_clk_200M", "video_aclk";
- clocks = <&clkc 15>, <&misc_clk_0>, <&clkc 15>;
- compatible = "xlnx,mipi-csi2-rx-subsystem-5.1";
- interrupt-names = "csirxss_csi_irq";
- interrupt-parent = <&intc>;
- interrupts = <0 30 4>;
- reg = <0x43c20000 0x1000>;
- xlnx,axis-tdata-width = <32>;
- xlnx,cal-mode = "NONE";
- xlnx,clk-io-swap = "false";
- xlnx,clk-lane-io-position = <0x0>;
- xlnx,clk-lp-io-swap = "false";
- xlnx,csi-en-activelanes = "false";
- xlnx,csi-en-crc = "true";
- xlnx,csi-filter-userdatatype = "false";
- xlnx,csi-opt1-regs = "false";
- xlnx,csi-pxl-format = "YUV422_8bit";
- xlnx,csi2rx-dbg = <0x0>;
- xlnx,data-lane0-io-position = <0x2>;
- xlnx,data-lane1-io-position = <0x4>;
- xlnx,data-lane2-io-position = <0x6>;
- xlnx,data-lane3-io-position = <0x8>;
- xlnx,dl0-io-swap = "false";
- xlnx,dl0-lp-io-swap = "false";
- xlnx,dl1-io-swap = "false";
- xlnx,dl1-lp-io-swap = "false";
- xlnx,dl2-io-swap = "false";
- xlnx,dl2-lp-io-swap = "false";
- xlnx,dl3-io-swap = "false";
- xlnx,dl3-lp-io-swap = "false";
- xlnx,dphy-lanes = <0x2>;
- xlnx,dphy-mode = "SLAVE";
- xlnx,en-7s-linerate-check = "false";
- xlnx,en-bg0-pin0 = "false";
- xlnx,en-bg0-pin6 = "false";
- xlnx,en-bg1-pin0 = "false";
- xlnx,en-bg1-pin6 = "false";
- xlnx,en-bg2-pin0 = "false";
- xlnx,en-bg2-pin6 = "false";
- xlnx,en-bg3-pin0 = "false";
- xlnx,en-bg3-pin6 = "false";
- xlnx,en-clk300m = "false";
- xlnx,en-cnts-byte-clk = "false";
- xlnx,en-csi-v2-0 = "false";
- xlnx,en-exdesigns = "false";
- xlnx,en-ext-tap = "false";
- xlnx,en-timeout-regs = "false";
- xlnx,en-vcx = "false";
- xlnx,esc-timeout = <0x6400>;
- xlnx,exdes-board = "ZCU102";
- xlnx,exdes-config = "MIPI_Video_Pipe_Camera_to_Display";
- xlnx,exdes-fmc = "LI-IMX274MIPI-FMC V1.0 Single Sensor";
- xlnx,exdesboard-version = "xilinx.com:vck190:part0:2.0";
- xlnx,fifo-rd-en-control = "true";
- xlnx,hs-line-rate = <0x320>;
- xlnx,hs-settle-ns = <0x93>;
- xlnx,hs-timeout = <0x10005>;
- xlnx,idly-group-name = "mipi_csi2rx_idly_group";
- xlnx,idly-tap = <0x1>;
- xlnx,init = <0x186a0>;
- xlnx,int-qor-check = <0x0>;
- xlnx,is-7series = "true";
- xlnx,is-versal = "false";
- xlnx,lprx-disable-extport = <0x0>;
- xlnx,max-lanes = <2>;
- xlnx,mipi-slv-int = <0x0>;
- xlnx,ooc-vid-clk = "6.666";
- xlnx,ppc = <1>;
- xlnx,rcve-alt-deskew-seq = "false";
- xlnx,rcve-deskew-seq = "false";
- xlnx,share-idlyctrl = "false";
- xlnx,stretch-line-rate = <0xdac>;
- xlnx,vc = <4>;
- xlnx,vfb ;
- mipi_csi_portsmipi_csi2_rx_subsyst_0: ports {
- #address-cells = <1>;
- #size-cells = <0>;
- mipi_csi_port0mipi_csi2_rx_subsyst_0: port@0 {
- reg = <0>;
- xlnx,cfa-pattern = "rggb";
- xlnx,video-format = <12>;
- xlnx,video-width = <8>;
- mipi_csirx_outmipi_csi2_rx_subsyst_0: endpoint {
- remote-endpoint = <&v_frmbuf_wr_0mipi_csi2_rx_subsyst_0>;
- };
- };
- mipi_csi_port1mipi_csi2_rx_subsyst_0: port@1 {
- reg = <1>;
- xlnx,cfa-pattern = "rggb";
- xlnx,video-format = <12>;
- xlnx,video-width = <8>;
- mipi_csi_inmipi_csi2_rx_subsyst_0: endpoint {
- };
- };
- };
- };
-
- v_frmbuf_wr_0: v_frmbuf_wr@43c30000 {
- #dma-cells = <1>;
- clock-names = "ap_clk";
- clocks = <&clkc 15>;
- compatible = "xlnx,v-frmbuf-wr-2.2", "xlnx,axi-frmbuf-wr-v2.1";
- interrupt-names = "interrupt";
- interrupt-parent = <&intc>;
- interrupts = <0 31 4>;
- reg = <0x43c30000 0x10000>;
- xlnx,dma-addr-width = <32>;
- xlnx,dma-align = <8>;
- xlnx,max-height = <480>;
- xlnx,max-width = <640>;
- xlnx,pixels-per-clock = <1>;
- xlnx,s-axi-ctrl-addr-width = <0x7>;
- xlnx,s-axi-ctrl-data-width = <0x20>;
- xlnx,vid-formats = "rgb888", "uyvy";
- xlnx,video-width = <8>;
- };*/
};
};
};
diff --git a/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi b/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi
index 32602c7..6945b9f 100644
--- a/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi
+++ b/scalp_mipi/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi
@@ -1,5 +1,5 @@
/*
- * Scalp Board DTS
+ * Scalp Board System User DTS
*
* Copyright (c) 2018-2021 Hepia
* Joachim Schmidt <joachim.schmidt@hesge.ch>
@@ -7,196 +7,40 @@
*/
/include/ "system-conf.dtsi"
+/include/ "pl-user.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
- model = "Zynq Scalp Board";
- compatible = "xlnx,zynq-scalp", "xlnx,zynq-7000";
-
- aliases {
- serial0 = &uart0; /* Bottom : MIO 46 - 47 (Switch on schematic) */
- serial1 = &uart1; /* Top : MIO 48 - 49 */
- ethernet0 = &gem0; /* MIO 16 - 27 */
- /* Switch the name. QSPI first */
- spi0 = &qspi; /* MIO 1 - 6 */
- spi1 = &spi0; /* MIO 40 - 41, 45 */
- spi2 = &spi1; /* EMIO */
- mmc0 = &sdhci1; /* MIO 10 - 15, 9 (card detect) */
- usb0 = &usb0; /* MIO 28 - 39 */
- i2c0 = &i2c0; /* MIO 50 - 51 */
- i2c1 = &i2c1; /* EMIO */
- can0 = &can1; /* MIO 52 - 53 */
- //gpio0 = &gpio0; /* MIO 0, 7, 8, 43, 44 */
- };
-
- /* 256 MB DDR3 */
- memory@0 {
- device_type = "memory";
- reg = <0 0x10000000>;
- };
-
- chosen {
- bootargs = "earlyprintk cpuidle.off=1 crashkernel=256M rw uio_pdrv_genirq.of_id=generic-uio";
- stdout-path = "serial0:115200n8";
- xlnx,eeprom = &eeprom;
- };
-};
-
-/ {
- amba_pl: amba_pl {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges ;
-
- scalp_safe_firmware_0: scalp_safe_firmware_reg_bank@43c10000 {
- //clock-names = "SAxiClkxCI";
- //clocks = <&clkc 15>;
- compatible = "generic-uio";
- reg = <0x43c10000 0x1000>;
+ model = "Zynq Scalp Board";
+ compatible = "xlnx,zynq-scalp", "xlnx,zynq-7000";
+
+ aliases {
+ serial0 = &uart0; /* Bottom : MIO 46 - 47 (Switch on schematic) */
+ serial1 = &uart1; /* Top : MIO 48 - 49 */
+ ethernet0 = &gem0; /* MIO 16 - 27 */
+ /* Switch the name. QSPI first */
+ spi0 = &qspi; /* MIO 1 - 6 */
+ spi1 = &spi0; /* MIO 40 - 41, 45 */
+ spi2 = &spi1; /* EMIO */
+ mmc0 = &sdhci1; /* MIO 10 - 15, 9 (card detect) */
+ usb0 = &usb0; /* MIO 28 - 39 */
+ i2c0 = &i2c0; /* MIO 50 - 51 */
+ i2c1 = &i2c1; /* EMIO */
+ can0 = &can1; /* MIO 52 - 53 */
+ //gpio0 = &gpio0; /* MIO 0, 7, 8, 43, 44 */
};
-
- misc_clk_0: misc_clk_0 {
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- compatible = "fixed-clock";
- };
-
- mipi_csi2_rx_subsyst_0: mipi_csi2_rx_subsystem@43c20000 {
- clock-names = "lite_aclk", "dphy_clk_200M", "video_aclk";
- clocks = <&clkc 15>, <&misc_clk_0>, <&clkc 15>;
- compatible = "xlnx,mipi-csi2-rx-subsystem-4.0";
- reg = <0x43c20000 0x1000>;
- reset-gpios = <&gpio0 55 GPIO_ACTIVE_LOW>;
- interrupt-names = "csirxss_csi_irq";
- interrupt-parent = <&intc>;
- interrupts = <0 30 4>;
- xlnx,axis-tdata-width = <32>;
- xlnx,cal-mode = "NONE";
- xlnx,clk-io-swap = "false";
- xlnx,clk-lane-io-position = <0x0>;
- xlnx,clk-lp-io-swap = "false";
- xlnx,csi-en-activelanes = "false";
- xlnx,csi-en-crc = "true";
- xlnx,csi-filter-userdatatype = "false";
- xlnx,csi-opt1-regs = "false";
- xlnx,csi-pxl-format = "YUV422_8bit";
- xlnx,csi2rx-dbg = <0x0>;
- xlnx,data-lane0-io-position = <0x2>;
- xlnx,data-lane1-io-position = <0x4>;
- xlnx,data-lane2-io-position = <0x6>;
- xlnx,data-lane3-io-position = <0x8>;
- xlnx,dl0-io-swap = "false";
- xlnx,dl0-lp-io-swap = "false";
- xlnx,dl1-io-swap = "false";
- xlnx,dl1-lp-io-swap = "false";
- xlnx,dl2-io-swap = "false";
- xlnx,dl2-lp-io-swap = "false";
- xlnx,dl3-io-swap = "false";
- xlnx,dl3-lp-io-swap = "false";
- xlnx,dphy-lanes = <0x2>;
- xlnx,dphy-mode = "SLAVE";
- xlnx,en-7s-linerate-check = "false";
- xlnx,en-bg0-pin0 = "false";
- xlnx,en-bg0-pin6 = "false";
- xlnx,en-bg1-pin0 = "false";
- xlnx,en-bg1-pin6 = "false";
- xlnx,en-bg2-pin0 = "false";
- xlnx,en-bg2-pin6 = "false";
- xlnx,en-bg3-pin0 = "false";
- xlnx,en-bg3-pin6 = "false";
- xlnx,en-clk300m = "false";
- xlnx,en-cnts-byte-clk = "false";
- xlnx,en-csi-v2-0 = "false";
- xlnx,en-exdesigns = "false";
- xlnx,en-ext-tap = "false";
- xlnx,en-timeout-regs = "false";
- xlnx,en-vcx = "false";
- xlnx,esc-timeout = <0x6400>;
- xlnx,exdes-board = "ZCU102";
- xlnx,exdes-config = "MIPI_Video_Pipe_Camera_to_Display";
- xlnx,exdes-fmc = "LI-IMX274MIPI-FMC V1.0 Single Sensor";
- xlnx,exdesboard-version = "xilinx.com:vck190:part0:2.0";
- xlnx,fifo-rd-en-control = "true";
- xlnx,hs-line-rate = <0x320>;
- xlnx,hs-settle-ns = <0x93>;
- xlnx,hs-timeout = <0x10005>;
- xlnx,idly-group-name = "mipi_csi2rx_idly_group";
- xlnx,idly-tap = <0x1>;
- xlnx,init = <0x186a0>;
- xlnx,int-qor-check = <0x0>;
- xlnx,is-7series = "true";
- xlnx,is-versal = "false";
- xlnx,lprx-disable-extport = <0x0>;
- xlnx,max-lanes = <2>;
- xlnx,mipi-slv-int = <0x0>;
- xlnx,ooc-vid-clk = "6.666";
- xlnx,ppc = <1>;
- xlnx,rcve-alt-deskew-seq = "false";
- xlnx,rcve-deskew-seq = "false";
- xlnx,share-idlyctrl = "false";
- xlnx,stretch-line-rate = <0xdac>;
- xlnx,vc = <4>;
- xlnx,vfb ;
- mipi_csi_portsmipi_csi2_rx_subsyst_0: ports {
- #address-cells = <1>;
- #size-cells = <0>;
- mipi_csi_port0mipi_csi2_rx_subsyst_0: port@0 {
- reg = <0>;
- xlnx,video-format = <0>;
- xlnx,video-width = <8>;
- mipi_csirx_outmipi_csi2_rx_subsyst_0: endpoint {
- remote-endpoint = <&v_frmbuf_wr_0mipi_csi2_rx_subsyst_0>;
- };
- };
- mipi_csi_port1mipi_csi2_rx_subsyst_0: port@1 {
- reg = <1>;
- xlnx,video-format = <0>;
- xlnx,video-width = <8>;
- mipi_csi_inmipi_csi2_rx_subsyst_0: endpoint {
- };
- };
- };
+
+ /* 256 MB DDR3 */
+ memory@0 {
+ device_type = "memory";
+ reg = <0 0x10000000>;
};
-
- v_frmbuf_wr_0: v_frmbuf_wr@43c30000 {
- #dma-cells = <1>;
- clock-names = "ap_clk";
- clocks = <&clkc 15>;
- compatible = "xlnx,v-frmbuf-wr-2.2", "xlnx,axi-frmbuf-wr-v2.1";
- reg = <0x43c30000 0x10000>;
- reset-gpios = <&gpio0 54 GPIO_ACTIVE_LOW>;
- interrupt-names = "interrupt";
- interrupt-parent = <&intc>;
- interrupts = <0 31 4>;
- xlnx,dma-addr-width = <32>;
- xlnx,dma-align = <8>;
- xlnx,max-height = <480>;
- xlnx,max-width = <640>;
- xlnx,pixels-per-clock = <1>;
- xlnx,s-axi-ctrl-addr-width = <0x7>;
- xlnx,s-axi-ctrl-data-width = <0x20>;
- xlnx,vid-formats = "rgb888", "uyvy";
- xlnx,video-width = <8>;
- };
-
- vcap_mipi_csi2_rx_subsyst_0 {
- compatible = "xlnx,video";
- dma-names = "port0";
- dmas = <&v_frmbuf_wr_0 0>;
- vcap_portsmipi_csi2_rx_subsyst_0: ports {
- #address-cells = <1>;
- #size-cells = <0>;
- vcap_portmipi_csi2_rx_subsyst_0: port@0 {
- direction = "input";
- reg = <0>;
- v_frmbuf_wr_0mipi_csi2_rx_subsyst_0: endpoint {
- remote-endpoint = <&mipi_csirx_outmipi_csi2_rx_subsyst_0>;
- };
- };
- };
+
+ chosen {
+ bootargs = "earlyprintk cpuidle.off=1 crashkernel=256M rw uio_pdrv_genirq.of_id=generic-uio cma=32M";
+ stdout-path = "serial0:115200n8";
+ xlnx,eeprom = &eeprom;
};
- };
};
/* PS_Clk50M_i */
@@ -300,83 +144,83 @@
*/
&spi0 {
- bus-num = <0>;
- status = "okay";
+ bus-num = <0>;
+ status = "okay";
- sja1105@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,sja1105t";
- reset-gpios = <&gpio0 44 GPIO_ACTIVE_LOW>;
- spi-max-frequency = <12000000>;
- spi-cpha;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- swp0_east: port@0 {
- label = "swp0_east";
- phy-mode = "rgmii";
+ sja1105@0 {
reg = <0>;
- //sja1105,role-phy;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,sja1105t";
+ reset-gpios = <&gpio0 44 GPIO_ACTIVE_LOW>;
+ spi-max-frequency = <12000000>;
+ spi-cpha;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ swp0_east: port@0 {
+ label = "swp0_east";
+ phy-mode = "rgmii";
+ reg = <0>;
+ //sja1105,role-phy;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
- port@1 {
- ethernet = <&gem0>;
- phy-mode = "rgmii";
- reg = <1>;
- //sja1105,role-phy;
+ port@1 {
+ ethernet = <&gem0>;
+ phy-mode = "rgmii";
+ reg = <1>;
+ //sja1105,role-phy;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
- swp2_bottom: port@2 {
- label = "swp2_bottom";
- phy-mode = "rgmii";
- reg = <2>;
- //sja1105,role-mac;
+ swp2_bottom: port@2 {
+ label = "swp2_bottom";
+ phy-mode = "rgmii";
+ reg = <2>;
+ //sja1105,role-mac;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
- swp3_top: port@3 {
- label = "swp3_top";
- phy-mode = "rgmii";
- reg = <3>;
- //sja1105,role-phy;
+ swp3_top: port@3 {
+ label = "swp3_top";
+ phy-mode = "rgmii";
+ reg = <3>;
+ //sja1105,role-phy;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
- swp4_west: port@4 {
- label = "swp4_west";
- phy-mode = "rgmii";
- reg = <4>;
- //sja1105,role-mac;
+ swp4_west: port@4 {
+ label = "swp4_west";
+ phy-mode = "rgmii";
+ reg = <4>;
+ //sja1105,role-mac;
- fixed-link {
- speed = <1000>;
- full-duplex;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
};
- };
};
- };
};
// &spi0 {
@@ -397,50 +241,50 @@
/* ethernet0 */
&gem0 {
- status = "okay";
- phy-mode = "rgmii"; /* "rgmii_id" */
- //phy-handle = <ðernet_phy>;
- xlnx,ptp-enet-clock = <0x7735940>;
- //local-mac-address = [00 0a 35 00 00 00];
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
-
- //ethernet_phy: ethernet-phy@0 {
- // reg = <0>;
- //};
+ status = "okay";
+ phy-mode = "rgmii"; /* "rgmii_id" */
+ //phy-handle = <ðernet_phy>;
+ xlnx,ptp-enet-clock = <0x7735940>;
+ //local-mac-address = [00 0a 35 00 00 00];
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+
+ //ethernet_phy: ethernet-phy@0 {
+ // reg = <0>;
+ //};
};
/* spi2 */
&spi1 {
- u-boot,dm-pre-reloc;
- is-decoded-cs = <0>;
- num-cs = <3>;
- status = "okay";
+ u-boot,dm-pre-reloc;
+ is-decoded-cs = <0>;
+ num-cs = <3>;
+ status = "okay";
};
&gpio0 {
- //compatible = "generic-uio";
- //status = "okay";
- emio-gpio-width = <32>;
- //gpio-controller;
- gpio-mask-high = <0x0>;
- gpio-mask-low = <0x5600>;
- //interrupt-controller;
- //interrupt-cells = <2>;
- //interrupt-parent = <&intc>;
- //interrupts = <0 20 4>;
+ //compatible = "generic-uio";
+ //status = "okay";
+ emio-gpio-width = <32>;
+ //gpio-controller;
+ gpio-mask-high = <0x0>;
+ gpio-mask-low = <0x5600>;
+ //interrupt-controller;
+ //interrupt-cells = <2>;
+ //interrupt-parent = <&intc>;
+ //interrupts = <0 20 4>;
};
/* mmc0 */
&sdhci1 {
- u-boot,dm-pre-reloc;
- xlnx,has-cd = <0x1>;
- xlnx,has-power = <0x0>;
- xlnx,has-wp = <0x0>;
- status = "okay";
+ u-boot,dm-pre-reloc;
+ xlnx,has-cd = <0x1>;
+ xlnx,has-power = <0x0>;
+ xlnx,has-wp = <0x0>;
+ status = "okay";
};
/* usb0 */
@@ -452,12 +296,12 @@
/* i2c0 */
&i2c0 {
- status = "okay";
+ status = "okay";
- eeprom: eeprom@53 {
- compatible = "microchip,24aa02e48";
- reg = <0x53>;
- };
+ eeprom: eeprom@53 {
+ compatible = "microchip,24aa02e48";
+ reg = <0x53>;
+ };
};
/* can0 */
@@ -499,26 +343,41 @@
};
&i2c1 {
- status = "okay";
- ov5640: camera@3c {
- compatible = "ovti,ov5640";
- reg = <0x3c>;
- clocks = <&pcam_clk>;
- clock-names = "xclk";
- DOVDD-supply = <&pcam_1v8>; // 1.8v
- AVDD-supply = <&pcam_2v8>; // 2.8v
- DVDD-supply = <&pcam_1v5>; // 1.5v
- powerdown-gpios = <&gpio0 59 GPIO_ACTIVE_HIGH>;
- reset-gpios = <&gpio0 58 GPIO_ACTIVE_LOW>;
-
- port {
- ov5640_to_mipi_csi2: endpoint {
- remote-endpoint = <&mipi_csi_inmipi_csi2_rx_subsyst_0>;
- clock-lanes = <0>;
- data-lanes = <1 2>;
- };
+ status = "okay";
+ ov5640: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&pcam_clk>;
+ clock-names = "xclk";
+ DOVDD-supply = <&pcam_1v8>; // 1.8v
+ AVDD-supply = <&pcam_2v8>; // 2.8v
+ DVDD-supply = <&pcam_1v5>; // 1.5v
+ powerdown-gpios = <&gpio0 59 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio0 58 GPIO_ACTIVE_LOW>;
+
+ port {
+ ov5640_to_mipi_csi2: endpoint {
+ remote-endpoint = <&mipi_csi_inmipi_csi2_rx_subsyst_0>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
};
- };
+};
+
+&mipi_csi2_rx_subsyst_0 {
+ compatible = "xlnx,mipi-csi2-rx-subsystem-4.0";
+ reset-gpios = <&gpio0 55 GPIO_ACTIVE_LOW>;
+};
+
+&mipi_csi_port0mipi_csi2_rx_subsyst_0 {
+ /delete-property/ xlnx,cfa-pattern;
+ xlnx,video-format = <0>;
+};
+
+&mipi_csi_port1mipi_csi2_rx_subsyst_0 {
+ /delete-property/ xlnx,cfa-pattern;
+ xlnx,video-format = <0>;
};
&mipi_csi_inmipi_csi2_rx_subsyst_0 {
@@ -526,3 +385,7 @@
remote-endpoint = <&ov5640_to_mipi_csi2>;
};
+&v_frmbuf_wr_0 {
+ reset-gpios = <&gpio0 54 GPIO_ACTIVE_LOW>;
+};
+
--
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