Update templage_regbank.vhd

.gitignore

+#########
+# Ignore
+#########
+# Emacs
+#########
+*.*~
+*.*#
+################
+# Do NOT ingore
+################

src/templates/hdl/template_regbank.vhd

@@ -129,7 +129,7 @@ begin
         SAxiBValidxAS  : SAxiBValidxSO                              <= SAxiBValidxS;
         SAxiWReadyxAS  : SAxiWReadyxSO                              <= SAxiWReadyxS;
         SAxiAWReadyxAS : SAxiAWReadyxSO                             <= SAxiAWReadyxS;
-        WrValidxAS     : WrValidxS                                  <= SAxiWValidxSI;
+        WrValidxAS     : WrValidxS                                  <= SAxiWValidxSI and not SAxiAWValidxSI;;
         WrDataxAS      : WrDataxD                                   <= SAxiWDataxDI;
         WrAddrOutxAS   : WrAddrxD                                   <= WrAddrxDP;
         WrAddrxAS      : WrAddrxDN((C_AXI4_ADDR_SIZE - 1) downto 0) <= SAxiAWAddrxDI((C_AXI4_ADDR_SIZE - 1) downto 0) when